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Ph.D. Dissertations and Masters Theses Supervised:

Ph.D. Dissertations Supervised:
  1. U. Albalawi, New Frameworks for Secure Image Communication in the Internet of Things (IoT), Summer 2016.
  2. S. Joshi, Analysis and Optimization of Graphene FET Based Integrated Circuits, Spring 2016.
  3. O. Okobiah, Geostatistical Inspired Metamodeling and Optimization of Nanoscale Analog Circuits, Spring 2014.
  4. S. Nimgaonkar, Secure and Energy Efficient Execution Frameworks Using Virtualization and Light-Weight Cryptographic Components, Summer 2014.
  5. G. Zheng, Layout-Accurate Ultra-Fast System Level Design Exploration Through Verilog-AMS, Spring 2013.
  6. O. Garitselov, Metamodeling-Based Fast Optimization of Nanoscale AMS-SoCs, Spring 2012.
  7. G. Thakral-Ghai, Process-Voltage-Temperature Aware Nanoscale Circuit Optimization, Fall 2010.
  8. D. V. Ghai, Variability Aware Low-Power Techniques for Nanoscale Mixed-Signal Circuits, Spring 2009.
Masters Theses Supervised:
  1. V. Dhayal, Exploring Simscape™ Modeling for Piezoelectric Sensor Based Energy Harvester, Spring 2017.
  2. N. Mukka, Simulink® Based Modeling of A Multi Global Navigation Satellite System, Summer 2016.
  3. G. Aluru, Exploring Analog and Digital Design Using Open-Source Electric VLSI Design System, Spring 2016.
  4. M. K. Mukka, Simulink based Design and Implementation of a Solar Power based Mobile Charger, Fall 2015.
  5. P. Lrmadhu, Comparative Analysis and Implementation of High Data Rate Wireless Sensor Network Simulation Frameworks, Fall 2015.
  6. A. Hanson, General Purpose Computing in GPU - A Watermarking Case Study, Summer 2014.
  7. M. Gautam, Exploring Memristor Based Analog Design in Simscape, Spring 2013.
  8. J. Franco, Rapid Prototyping and Design of a Fast Random Number Generator, Spring 2012.
  9. G. Coelho, OTA-Quadrotor: An Object-Tracking Quadrotor for Real-Time Detection and Recognition, Spring 2012.
  10. O. Okobiah, Exploring Process-Variation Tolerant Design of Nanoscale Sense Amplifier Circuits, Fall 2010.
  11. I. Zarate, Software and Hardware in the Loop Modeling of an Audio Watermarking Algorithm, Fall 2010.
  12. R. Rastogi-Bani, A New N-Way Reconfigurable Data Cache Architecture for Embedded Systems, Fall 2009.
  13. S. Rangoonwala, A Verilog 8051 Softcore for FPGA Applications, Spring 2009.
  14. S. Naraharisetti, Region Aware DCT Domain Invisible Robust Blind Watermarking for Color Images, Fall 2008.
  15. A. Mendoza, Hardware Software Co-Design of a JPEG2000 Watermarking Encoder, Fall 2008.
  16. S. Tarigopula, A CAM based High-Performance Classifier-Scheduler for a Video Network Processor, Spring 2008.
  17. N. Pati, Occlusion Tolerant Object Recognition Methods for Video Surveillance and Tracking of Moving Civilian Vehicles, Fall 2007.
  18. S. T. Vadlamudi, A Nano-CMOS Based Universal Voltage Level Converter for Multi-VDD SoCs, Spring 2007.
  19. A. Palakodety, CMOS Active Pixel Sensors for Digital Cameras: Current State-of-the-Art, Spring 2007.
  20. W. Cai, FPGA Prototyping of a Watermarking Algorithm for MPEG-4, Spring 2007.
  21. G. Sarivisetti, Design and Optimization of Components in a 45nm CMOS Phase Locked Loop, Fall 2006.
  22. A. K. Ale, Comparison and Evaluation of Existing Analog Circuit Simulators Through a Sigma-Delta Modulator, Fall 2006.
  23. O. B. Adamo, VLSI Architecture and FPGA Prototyping of a Secure Digital Camera for Biometric Application, Summer 2006.
  24. R. Velagapudi, Modeling and Reduction of Gate Leakage during Behavioral Synthesis of NanoCMOS Datapath Circuits, Spring 2006.
  25. V. Mukherjee, A Dual Dielectric Approach for Performance Aware Reduction of Gate Leakage in Combinational Circuits, Spring 2006.
  26. C. Renuka Kumara, VLSI Implementation of Invisible Robust/Fragile Digital Watermarking Algorithms, Spring 2004.

Last updated on 01 Aug 2017 (Tue).
© Saraju P. Mohanty