Test 3 Syllabus
CSCI 4330 / CSCI 5330: Digital Systems
Design with VHDL
Instructor: Dr. Saraju P. Mohanty
NOTE:
·
This is closed
book, closed text examination.
·
Calculators are
NOT allowed in the examination.
NOTE: All materials covered
in class or laboratory from 2nd Nov to 23rd Nov is the
syllabus for the Test 3.
- Variables and Functions
- Logic Gates and Networks
- Boolean Algebra
- Synthesis using, AND, OR,
NOT, NAND, NOR
- Karnaugh
Map and Strategy for Minimization
- Analysis of combinational Circuits
- Number representation
- Adder and subtractor Circuits
- Multiplier Circuits
- Multiplexers and Decoders
- Code Converters
- Latches and Flip-Flops
- Sequential circuit
analysis
- Sequential circuit design
- Registers and Counters