Test 3 Syllabus

CSCE 5730: Digital CMOS VLSI Design

Instructor: Dr. Saraju P. Mohanty

NOTE: This is a closed book/text examination.

1. Capacitance of wire
2. Resistance of wire
3. Inductance of wire
4. Cross talk
5. Elmore delay model
6. Lumped and Distributed RC models
7. Delay definitions
8. Switch-level RC delay models and Estimation
9. CMOS Fabrication steps
10. Layout, Packaging, and Bonding