Test 3 Syllabus

CSCE 5730: Digital CMOS VLSI Design

Instructor: Dr. Saraju P. Mohanty

NOTE: This is closed book/text examination.

1. Capacitance of wire
2. Resistance of wire
3. Inductance of wire
4. Cross talk
5. Elmore delay model
6. Lumped and Distributed RC models
7. Delay definitions
8. Switch-level RC delay models
9. Steady State Response of Inverter
10. Voltage Transfer Characteristic (VTC) of Inverter
11. Switch Model of Dynamic Behavior of Inverter
12. Switching Threshold of Inverter
13. Impact of Process Variation on VTC of Inverter
14. Impact of Scaling the Supply Voltage on VTC of Inverter
15. Approaches to calculate Propagation Delay in inverter
16. Delay as a function of V_DD, S, b
17. Inverter chain for minimal path delay
18. Dynamic, short-circuit, static, and leakage power consumption of inverter
19. Transistor Sizing for Minimum Energy
20. Principles for Power Reduction
21. Materials covered on 25th Apr lecture.