Test 3 Syllabus

CSCE 2610: Computer Organization

Instructor: Dr. Saraju P. Mohanty

NOTE: This is closed book/text examination.

1. Representing Instructions
2. MIPS R-format Instructions
3. MIPS I-format Instructions
4. MIPS J-format Instructions
5. MIPS R-format Instructions
6. Fixed versus variable length instructions
7. Assembly versus Machine Language
8. Procedure Calling
9. Memory Layout
10. Addressing Mode
11. Value of a Digit or Number
12. Why Don’t Computers Use Decimals?
13. Possible Representations of  binary integers
14. Addition and Subtraction operations
15. Detecting Overflow
16. Effects of Overflow
17. Two options of MIPS handling overflow
18. Exception and Interrupt
19. Exception in MIPS
20. What Happens in a Computer When Interrupt/Exception Occurs?
21. How could we build a 1-bit ALU for add, and, and or?
22. How could we build a 32-bit ALU?
23. Support subtraction in ALU
24. Support the set-on-less-than instruction (slt)
25. Supporting slt and Overflow in ALU
26. 32-bit ALU for MIPS supporting: add, sub, or, and, slt, beq, overflow
27. Binary Multiplication
28. Binary Multipliers: Hand calculation to hardware
29. Binary Multiplication Implementation:  v1
30. Fast Multiplication Hardware
31. MIPS Multiplication Instructions
32. Binary Division
33. Binary Division Implementation: v1
34. MIPS Division Instructions
35. IEEE 754 floating point standard
36. Float-Point Representation: Single Precision
37. Float-Point Representation: Double Precision
38. Floating Point Addition
39. Floating Point Multiplication
40. Floating-Point Instruction in MIPS
41. The Processor: Datapath & Control
42. Basic Building Blocks of Processor
43. Register File: Read and Write Operation
44. Datapath construction supporting: R-format, lw, sw, beq
45. Designing the ALU and Main Control in processor
46. How does the single cycle datapath work?
47. How do we handle jump in processor?
48. Single Cycle Implementation - Issues
49. Single Cycle, Multiple Cycle, vs. Pipeline
50. Multicycle Datapath Approach
    

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