Test 3 Syllabus

CSCE 5730/4730: Digital CMOS VLSI Design

Instructor: Dr. Saraju P. Mohanty


NOTE: This is closed book/text examination. 

  1. There regions of MOSFET operation
  2. I-V characteristic (Shockley 1st order transistor models)
  3. I-V characteristics : NMOS vs PMOS
  4. Concept of threshold voltage
  5. R-V characteristic of MOSFET
  6. C-V characteristic of MOSFET
  7. Velocity saturation
  8. Mobility degradation
  9. Channel length modulation
  10. Body effect
  11. Subthreshold conduction
  12. Junction leakage
  13. Gate leakage (tunneling)
  14. Operating temperature on MOSFET operation
  15. Device geometry change due to manufacturing issues
  16. Classes of interconnect parasitics
  17. Interconnect capacitance model
  18. Crosstalk
  19. Wire resistance
  20. The Elmore delay model
  21. Pi and T lumped RC models
  22. Concept of contamination and propagation delay
  23. Concept of unit NMOS and PMOS
  24. Estimation using the unit NMOS and PMOS
  25. Fabrication steps of an inverter