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Presentations -- 2005:
-
Seminar, Department of Computer Science and Engineering, Southern
Methodist University, Dallas, TX, 16th Nov 2005 (Gate Leakage Analysis
and Reduction in Nanoscale CMOS circuits)
-
ICCD 2005 Talk (A Dual Dielectric Approach for Performance
Aware Gate Tunneling Reduction in Combinational Circuits)
-
IWLS 2005 Talk (Analytical Modeling and Reduction of Direct Tunneling Current during
Behavioral Synthesis of Nanometer CMOS Circuits)
-
ISVLSI 2005 Talk (Reduction of Direct Tunneling Power Dissipation
during Behavioral Synthesis of Nanometer CMOS Circuits)
- Seminar,
Department of Electrical Engineering, University of Texas, Dallas, TX,
28th Mar 2005 (DKDT: A Performance Aware Dual Dielectric Assignment for
Tunneling Current Reduction)
- Seminar,
Department of Electrical and Computer Engineering, Oklahoma State
University, Stillwater, OK, 10th Mar 2005 (DKDT: A Performance Aware
Dual Dielectric Assignment for Tunneling Current Reduction)
- Seminar,
Department of Electrical and Computer Engineering, University of Utah,
Salt Lake City, UT, 4th Feb 2005 (DKDT: A Performance Aware Dual
Dielectric Assignment for Tunneling Current Reduction)
-
VLSI Design 2005 Talk (Watermarking Encoder using Dual Voltage and Frequency)