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Publications -- 2008:
  1. S. P. Mohanty and B. K. Bhargava, “Invisible Watermarking Based on Creation and Robust Insertion-Extraction of Image Adaptive Watermarks”, ACM Transactions on Multimedia Computing, Communications, and Applications (TOMCCAP), Volume 5, Issue 2, November 2008, pp. 12:1-12:22. 
  2. S. P. Mohanty, E. Kougianos, and D. K. Pradhan, "Simultaneous Scheduling and Binding for Low Gate Leakage Nano-Complementary Metal-Oxide-Semiconductor Datapath Circuit Behavioural Synthesis", IET Computers & Digital Techniques (CDT), March 2008, Volume 2, Issue 2, pp. 118-131.
  3. E. Kougianos and S. P. Mohanty, "Design Metrics for Gate Oxide Tunneling Leakage Characterization in Nano-CMOS Transistors", Taylor & Francis International Journal of Electronics (IJE), Vol. 95, No. 5, May 2008, pp. 411-423.
  4. J. Singh, D. K. Pradhan, S. Hollis and S. P. Mohanty, “A Single Ended 6T SRAM Cell Design for Ultra-Low-Voltage Applications”, IEICE Electronics Express, Vol. 5, No. 18, pp.750-755, 2008.
  5. S. K. Mandal, P. Bhojwani, S. P. Mohanty, and R. N. Mahapatra, "IntellBatt: Towards Smarter Battery Design", in Proceedings of the 45th ACM/IEEE Design Automation Conference (DAC), pp. 872-877, 2008 (blind review, 147 papers accepted out of 639 submissions, acceptance rate - 23%).
  6. S. P. Mohanty, "ILP based Gate Leakage Optimization using DKCMOS Library during RTL Synthesis", in Proceedings of the 9th International Symposium on Quality Electronic Design (ISQED), pp. 174-177, 2008 (blind review, 90 regular papers accepted out of 300 submissions, acceptance rate - 30%).
  7. D. Ghai, S. P. Mohanty, and E. Kougianos, "A Process and Supply Variation Tolerant Nano-CMOS Low Voltage, High Speed, A/D Converter for System-on-Chip", in Proceedings of the 18th ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 47-52, 2008 (blind review, 40 regular papers accepted out of 220 submissions, acceptance rate - 18.2%).
  8. D. Ghai, S. P. Mohanty, and E. Kougianos, "A Dual Oxide CMOS Universal Voltage Converter for Power Management in Multi-VDD SoCs", in Proceedings of the 9th International Symposium on Quality Electronic Design (ISQED), pp. 257-260, 2008 (blind review, 90 regular papers and 65 poster papers accepted out of 300 submissions, acceptance rate - 51.6%).
  9. D. Ghai, S. P. Mohanty, and E. Kougianos, "Parasitic Aware Process Variation Tolerant Voltage Controlled Oscillator (VCO) Design", in Proceedings of the 9th International Symposium on Quality Electronic Design (ISQED), pp. 330-333, 2008 (blind review, 90 regular papers and 65 poster papers accepted out of 300 submissions, acceptance rate - 51.6%).
  10. J. Singh, J. Mathew, D. K. Pradhan, and S. P. Mohanty, “A Subthreshold Single Ended I/O SRAM Cell Design for Nanometer CMOS Technologies”, in Proceedings of the IEEE International SOC Conference (SOCC), pp. 243-246, 2008 (blind review).
  11. J. Singh, J. Mathew, D. K. Pradhan, and S. P. Mohanty, “Failure Analysis for Ultra Low Power Nano-CMOS SRAM Under Process Variations”, in Proceedings of the IEEE International SOC Conference (SOCC), pp. 251-254, 2008 (blind review).
  12. J. Singh, J. Mathew, S. P. Mohanty, and D. K. Pradhan, "A Nano-CMOS Process Variation Induced Read Failure Tolerant SRAM Cell", in Proceedings of the 40th IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3334-3337, 2008 (911 papers accepted out of 1858 submissions, acceptance rate - 49%).
  13. Y. –T. Pai, L. –T. Lee, S. –J. Ruan, Y. -H. Chen, S. P. Mohanty, and E. Kougianos, “Honeycomb Model Based Skin Color Detector for Face Detection”, in Proceedings of the 15th International Conference on Mechatronics and Machine Vision in Practice (M2VIP), pp. 11-16, 2008.
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Last updated on 01 Jan 2013 (Tuesday).
© Saraju P. Mohanty